3D Multi-board PCB Design

Design Force

The highest performing board design and analysis solution, Design Force supports single board, multi-board and chip-package-board interconnect analysis and optimization. Combining traditional 2D design with native 3D design and the latest human interface techniques, accelerated graphics and almost instantaneous rendering and refreshing, Design Force is the fastest, most effective PCB design solution available today.

A mouse in one hand and a touchpad in the other enables two-handed design. Menu picks, mouse clicks and mouse travel distance are greatly reduced, making it much faster and easier to use than comparable ECAD solutions.

Design Force enables design teams to layout their designs as in the context of a complete system or product. Designers can easily create any design from quick prototype boards to complex, multi-board systems using one tool.

Enics logo“With Zuken’s CR-8000 Design Force we have state-of-the-art technology to help us respond to the latest trends in the electronics industry.”
– Patrik Modig, Site Manager

Webinar: I/O Optimization with 3D SoC, SiP, and PCB Co-design

Webinar

Watch Now

Panasonic logo“In the development of the world’s thinnest and lightest 20-inch large-screen 4K tablet, CR-8000 Design Force’s system-level SI and thermal analysis effectively reduced the number of design spins during the project. Due to the success of this project, we will make more efforts with Zuken to develop our next generation 4K tablet using CR-8000 Design Force.”
– Mr. Kiyoshi Nakanishi, 4K Tablet Development Manager

With inherent support for high-speed designs, engineers and layout designers can conduct signal integrity, EMC, and power integrity analysis concurrently, manage constraints, and autoroute a board – all in one environment. With a native 2D and 3D architecture, designers can effectively co-design a chip, package and board to optimize I/Os at each level, embed components in the dielectric of a stack-up intelligently, and verify manufacturing rules in real-time. Produce designs with concurrent design-for-manufacturing checks and constraint verification to ensure both manufacturing and engineering intent are maintained during the design process.

It includes interactive and automatic design tools with embedded SI analysis and verification.

advanced IC packagingCR-8000 Design Force offers an intuitive, integrated environment for designing single and multi-die packages for wire-bond, flip-chip, and high density advanced packaging or printed circuit board (PCB). Designers can start designs with instant input of chip and package structures from the library, reuse data from IC layout tools, and take advantage of parametric wizards to streamline the creation of the system. Design Force includes support of 2D- and 3D-based design and manufacturing rules to ensure your package is designed right-the-first-time. With the native 3D platform of Design Force, designers can easily implement and manage dense interconnects for wire bond or flip chip packages, and incorporate advanced embedded component technology for advanced packaging and module design

Benefits

  • Unified environment to handle any packaging technologies, including chip scale packaging (CSP), multi-chip modules (MCMs), and system-in-package SiP
  • Parametric wizards for chip and package structures reduces time and effort for implementing complex package designs
  • Automatic ball assignment with the ability to optimize complex routing solutions.
  • Conduct feasibility studies and shorten design implementation with advanced fan-out/fan-in and autorouting features to optimize package layer count
  • Native 3D environment enables true rules-driven approach to ensure designs are implemented and verified accurately
  • Hierarchical database allows users to conduct co-design with ICs and PCBs in one environment to realize the latest technologies, such as 2.5/3D IC design

For advanced packaging designs, Design Force includes an array of utilities and wizards to accurately define wire-bond profiles, bond pad placement, multi-die or bond-pad connections, managing the stacking of ICs with online design and manufacturing rule checks. Designers can leverage the many interactive and automatic routing tools to reduce effort conducting fan-in/fan-out routing, automatic ball assignments on the package, and routing of the complete package. Design teams can also access embedded signal and power integrity, along with support for interfaces with best-in-class simulation, and analysis tools from Ansys, Keysight, National Instruments, CST and Synopsys.

Design Force eases the design and management of complex, system-level electronic designs. It has the ability to hierarchically construct package design with chip and PCB to offer designers improved system performance at the lowest cost through I/O optimization in one environment. The unique system-level capabilities of Design Force enable design teams to conduct path finding and feasibility studies earlier in the design process by creating or reusing design data, or through approximate models. With a true co-design platform, designers can conduct rapid and accurate exploration of the true interconnect structure, carry out concurrent signal and power integrity analysis, or interface to best-in-class tools.

Chip Package Board Co-designDesign Force offers the industry’s first native 3D environment supporting a true hierarchy relationship between the chip, package and PCB in a system. This helps design teams work together concurrently to perform true co-design of the system, with the flexibility to support existing methodologies and work flows. Design Force includes a multi-board Constraint Manager to easily define the connectivity between the chip, package and board, and help users to cross-probe and visualize the system-level interconnect then report the net length result.

Benefits

  • Multi-board constraint browser simplifies hierarchical construction of systems to view and analyze system-level interconnects
  • Chip or package-centric interposer design supported with through-silicon-vias (TSV), and bidirectional support with IC layout tools using LEF/DEF
  • Support for OpenAccess allows the design of chip redistribution layers and interposers with native IC-level design and manufacturing rules
  • Conduct ball-map optimization with co-design of packages and PCBs\
  • Conduct quick feasibility routing studies of chip RDL and packages to reduce layer count and improve design performance between the chip, package and board

Co-designDesign Force works natively in an OpenAccess environment and can bi-directionally exchange LEF/DEF files with IC layout tools. This allows co-design with chip-level design and manufacturing rules. Users can optimize I/O pin assignment bump and ball patterns, RDL and interposer routing, and die escape routing to improve signal performance, routability of signals across the system, and reduce layer cost at the chip, package and board level.

During the exploration phase, Design Force enables engineering teams to conduct path finding and feasibility studies earlier in the design process by creating or reusing design data to conduct what-if analysis. With this true co-design platform, designers can go from exploratory to design implementation in one common environment, and conduct signal and power integrity analysis concurrently, or interface to best-in-class simulation and analysis tools from Ansys, Keysight, National Instruments, CST and Synopsys.

Zuken is working closely with IEEE and JEITA to support new industry standards, such as the new Large Scale Integrated (LSI) LSI-Package-Board (LPB) format. LPB allows cross-discipline design teams to exchange system-level netlists, component information, design rules and more. This intelligent approach for exchanging design information within the design process helps eliminate the costly errors that occur when using non-engineering formats such as text files or spreadsheets.

Simulation and AnalysisCR-8000 is a complete design environment that includes fully integrated simulation and analysis tools to verify your single or multi-board designs. During circuit design, Design Gateway provides embedded simulation, analysis and electrical rules checking. During PCB layout, the Design Force embedded signal integrity, power integrity, electromagnetic interference1, and electromagnetic compatibility2 tools provide a single environment solution for all of your design team’s simulation and analysis requirements. This eliminates the need for time-intensive export, analyze, rework and repeat using separate tools. Simulation and analysis can be performed on a single board (SI/PI/EMI/EMC) or across multiple boards (SI). Identify and correct system and board-level errors and issues early in the design process!

Signal Integrity Features

  • Assist with topology planning
  • Automatically or interactively assign simulation models
  • Generate waveforms directly from circuit design
  • Test signal route order with standard or user-defined topologies
  • Conduct “what-if” analysis to determine effective termination

Power Integrity / Electromagnetic Interference Features

  • Identify critical power integrity and EMI issues during layout
  • Report on the voltage drop and current density of power nets
  • Verify the distribution of power to ground impedance and also the input impedance of power pins
  • Evaluate common mode and differential mode emissions
  • Review power bus performance
  • Optimize IC and decoupling capacitor placement
  • Validate the quality of Power Distribution Networks (PDN – AC and DC analysis)

Electromagnetic Compatibility Features

  • Access to 36 rules in six categories to ensure complete coverage of all EMC performance issues including:Track shielding
    • Open and closed loops
    • Impedance matching
    • Return path
  • Effortless error detection via an easy-to-use spreadsheet report with highlighting and cross-probing
  • Intuitive view of the EMC analysis results on the Design Force canvas in either 2D or 3D

Third-party analysis tools

  • Analog simulationSynopsys HSPICE
  • Modeling and simulating physical systems
    • Synopsys Saber Platform

Design Force also includes interfaces to best-in-class analysis tools providing you with a single circuit simulation platform. The add-on simulators include:

  • RF Analysis
    • Keysight ADS
    • AWR Microwave Office
    • CST Microwave Studio
  • Power Integrity / EMI
    • Cadence Sigrity
  • 3D Fullwave Analysis
    • Ansys SIwave

The Design Force integrated layout, simulation and analysis environment will help your design team detect errors earlier in the design process, thereby reducing cycle time, errors, rework and design spins.

3D ECAD MCAD Convergence3D product visualization is becoming a critical need as the electrical and mechanical designs converge with little room for error. Many companies cite ECAD / MCAD design synchronization as a significant product design challenge. Traditional 2D PCB-centric design cannot meet the needs of a 3D multi-discipline product design process.

Design Force has the ability to import and export STEP models so MCAD design data exchange is direct and without data conversion. True 3D component models and enclosures can be obtained from any number of MCAD design tools. Once imported into Design Force, the PCB or multiple PCBs can be oriented within the enclosure and checked for a required clearance or an actual collision. Using accurate 3D checks with a true 3D component model with a precisely-matched 3D shape, rather than simplified boundary boxes, increases the overall accuracy of collision checking and reduces the risk of prototype reworking at the manufacturing stage because of a fit problem.

The ability to quickly and repeatedly verify fit during the design process will eliminate costly downstream ECAD / MCAD integration problems.

Multi-Instance, Interactive and Automatic Routing

Dragon EX RoutingDragon EX for Design Force empowers designers with simultaneous access to Zuken’s advanced interactive and automatic routing capabilities. During board layout, users specify multiple instances of strategy-driven areas and simultaneously autoroute the design. This significantly improves design completion times.

Users specify a routing strategy within each area defined with Dragon EX. Using Routing Consultant, they can analyze potential obstacles impacting the router and automatically create strategies based on objects and rules defined in the design. Dragon EX creates fanouts or escape routing patterns to simplify implementation and improve the routability of high pin-count devices.

Icon

Case Study: Endress+Hauser standardizes PCB engineering and production processes for industrial measurement products across distributed locations

Endress+Hauser is a global leader in measurement instrumentation, services and solutions for industrial process engineering.

3.38 MB
Icon

Case Study: Renishaw gets better fit and impedance control for complex flexible PCBs in metrology instruments using CR-8000

Working in 3D for the first time, Renishaw’s PCB designers noticed a host of benefits, including fixing housing fit issues upfront and easier component placement.

1.76 MB
Icon

Case Study: Rohde & Schwarz manages variants with increased efficiency using Zuken’s CR-5000 suite

Rohde & Schwarz manages variants with increased efficiency using Zuken’s CR-5000 suite. In a sophisticated design flow, the schematic provides a master data set that drives all PCB assembly variants.

807.90 KB
Icon

Design Force - Multi-board System Design

Design Force fully leverages the latest industry hardware and software capabilities, allowing users to design in a native 3D environment, obtaining optimal performance by utilizing native 64-bit, multi-threading, multi-core processors.

637.48 KB
Icon

Datasheet: Design Force - Chip, Package and Board Co-Design

Comprehensive system co-design recognizes the interaction between chip, package, and board data to reduce complexity, size and cost of the overall system.

1.56 MB
Icon

Datasheet: Design Force - Advanced Packaging

Traditional two dimensional design tools often fall short when it comes to studyingthe structure and routability of the advanced packages required for today’scomplex designs.

1.36 MB