3D Multi-board PCB Design
The highest performing board design and analysis solution, Design Force supports single board, multi-board and chip-package-board interconnect analysis and optimization. Combining traditional 2D design with native 3D design and the latest human interface techniques, accelerated graphics and almost instantaneous rendering and refreshing, Design Force is the fastest, most effective PCB design solution available today.
A mouse in one hand and a touchpad in the other enables two-handed design. Menu picks, mouse clicks and mouse travel distance are greatly reduced, making it much faster and easier to use than comparable ECAD solutions.
Design Force enables design teams to layout their designs as in the context of a complete system or product. Designers can easily create any design from quick prototype boards to complex, multi-board systems using one tool.
“In the development of the world’s thinnest and lightest 20-inch large-screen 4K tablet, CR-8000 Design Force’s system-level SI and thermal analysis effectively reduced the number of design spins during the project. Due to the success of this project, we will make more efforts with Zuken to develop our next generation 4K tablet using CR-8000 Design Force.”
– Mr. Kiyoshi Nakanishi, 4K Tablet Development Manager
Ease of Use
With inherent support for high-speed designs, engineers and layout designers can conduct signal integrity, EMC, and power integrity analysis concurrently, manage constraints, and autoroute a board – all in one environment. With a native 2D and 3D architecture, designers can effectively co-design a chip, package and board to optimize I/Os at each level, embed components in the dielectric of a stack-up intelligently, and verify manufacturing rules in real-time. Produce designs with concurrent design-for-manufacturing checks and constraint verification to ensure both manufacturing and engineering intent are maintained during the design process.
It includes interactive and automatic design tools with embedded SI analysis and verification.
As IC packaging architecture advances, Zuken’s Design Force enables the designer to deal with the growing complexity in design space in handling high pin-counts, high density designs and the need to interface with multiple formats and flows. Parametric wizards are available to define and optimize pin maps. A native 3D interface is available to deal with the various package architectures allowing for seamless co-design with chip and PCB designs. For feasibility studies, automatic fan-out and full routing features are available.Learn More
Zuken’s CR-8000 Design Force offers true co-design through a hierarchical setup wherein multiple designs can be brought together in the same framework. The connectivity between designs can be setup automatically or manually. The user is then able to move between designs (chip RDL, package or board or any combination thereof). This enables user to accurately see and edit the nets/routing on a system scale.Learn More
Simulation and Analysis
CR-8000 is a complete design environment that includes fully integrated simulation and analysis tools to verify your single or multi-board designs. During circuit design, Design Gateway provides embedded simulation, analysis and electrical rules checking. During PCB layout, the Design Force embedded signal integrity, power integrity, electromagnetic interference, and electromagnetic compatibility tools provide a single environment solution for all of your design team’s simulation and analysis requirements. This eliminates the need for time-intensive export, analyze, rework and repeat using separate tools. Simulation and analysis can be performed on a single board (SI/PI/EMI/EMC) or across multiple boards (SI). Identify and correct system and board-level errors and issues early in the design process!Learn More
3D product visualization is becoming a critical need as the electrical and mechanical designs converge with little room for error. Many companies cite ECAD / MCAD design synchronization as a significant product design challenge. Traditional 2D PCB-centric design cannot meet the needs of a 3D multi-discipline product design process.
Design Force has the ability to import and export STEP models so MCAD design data exchange is direct and without data conversion. True 3D component models and enclosures can be obtained from any number of MCAD design tools. Once imported into Design Force, the PCB or multiple PCBs can be oriented within the enclosure and checked for a required clearance or an actual collision. Using accurate 3D checks with a true 3D component model with a precisely-matched 3D shape, rather than simplified boundary boxes, increases the overall accuracy of collision checking and reduces the risk of prototype reworking at the manufacturing stage because of a fit problem.
The ability to quickly and repeatedly verify fit during the design process will eliminate costly downstream ECAD / MCAD integration problems.
Multi-Instance, Interactive and Automatic Routing
Dragon EX for Design Force empowers designers with simultaneous access to Zuken’s advanced interactive and automatic routing capabilities. During board layout, users specify multiple instances of strategy-driven areas and simultaneously autoroute the design. This significantly improves design completion times.
Users specify a routing strategy within each area defined with Dragon EX. Using Routing Consultant, they can analyze potential obstacles impacting the router and automatically create strategies based on objects and rules defined in the design. Dragon EX creates fanouts or escape routing patterns to simplify implementation and improve the routability of high pin-count devices.
Datasheet: Design Force - Chip, Package and Board Co-Design
Comprehensive system co-design recognizes the interaction between chip, package, and board data to reduce complexity, size and cost of the overall system.Download
Datasheet: Design Force - Advanced Packaging
Traditional two dimensional design tools often fall short when it comes to studyingthe structure and routability of the advanced packages required for today’scomplex designs.Download
Design Force - Multi-board System Design
Design Force fully leverages the latest industry hardware and software capabilities, allowing users to design in a native 3D environment, obtaining optimal performance by utilizing native 64-bit, multi-threading, multi-core processors.
Zuken and Polar Instruments Collaborate to Achieve Design Consistency from Prototype to Volume Production
Polar Instruments and Zuken announce a direct link between Speedstack, Polar’s PCB layer stackup design and documentation tools, and Zuken CR-8000 Design Force and DFM Center.
Historically, companies like Lockheed Martin and Fujitsu design the boards and contract with suppliers like Sanmina to build and test them. Inevitably, issues arise during manufacturing that necessitate back and forth communication and design changes. Lacking a proper standard to facilitate bi-directional information flows, suppliers resort to ad-hoc and often inefficient means such as e-mail and phone calls to relay these design changes. It is the subsequent manual transcription and reentry of this data – and the error-prone nature of the task – that wastes time and money for both the OEMs and the PCB manufacturers.
The latest release of Zuken’s system-level PCB design environment, CR-8000, has received numerous enhancements aimed at ensuring performance, quality and manufacturability.
Design Force features an option to shield signals when creating their routes. The shield option automatically inserts shielding side by side, above and below, or on all four sides of the signal being routed. Figure 1 shows a signal (blue trace in the middle) shielded on all four sides by the green conductors, which are connected to the ground.
In the 2018 release of CR-8000 Design Force, an amazing new improvement has been made to reinforce via.
Tech Tip: Use 'Generate Bump Line' in Design Force to Match Lengths of Positive and Negative Tracks for Differential Pairs
In CR-8000 Design Force, the Generate Bump utility allows the designer to add a bump line either single or sequentially to a differential pair route. Bump line size, style and space can be set in the dialog. Accurate length differences can be seen in the Constraint Browser during this process.
Modern PCB design tools permit the definition of design constraints, including constraints relating to high-speed design and EMC, such as topology of connectors (routing pin sequence), or overshoot and timing budgets, for example.
Zuken has been developing PCB design tools for the automotive market for years. With automotive electronics worth over $200 billion globally, and growing every day, Zuken is preparing for a brave new world of smart cars, and autonomous and electric vehicles. I spoke with Humair Mandavia, chief strategy officer with Zuken, and asked him about the challenges facing automotive PCB designers, and the trends he’s seeing in the constantly evolving segment of the industry.
CR-8000’s Design Force Dragon EX tool can be used to fanout BGAs. Simply draw a Dragon area around your BGA. Then select the Dragon area and create a strategy to fanout the pads of your BGA. You can create steps to fanous pads based on signal names. The ground pins can be fanned out to the ground plane layer using a specified via. You can control the layers used, fanout direction, and vias.
Ghosting of the template areas can be seen when dragging the cursor over its outline regardless of the visibility of the template layers. This will happen when the template layers are set as “Selectable layer” in the Layer Settings dialog. This is most common so the designer can select templates regardless of the active layer.
Even though power integrity strategies are now discussed on a daily basis, power distribution design is still a third order design aspect, done late in the design. It involves often a “design-by-hope” approach doing a copper pouring of the power-templates, and additionally sprinkling the board with decoupling capacitors. Such traditional methods of designing complex PCBs, and their power distribution systems (PDS) in particular, cost companies time and money in both the design and manufacturing stages.
CR-8000 Design Force 2017 has improved the offset via function by adding efficiency in pulling out tracks from vias, creating BGA designs and build-up designs.
A common task that is often dreaded among PCB designers is having to relocate a large point-count BGA that’s fanned out, and even partially escaped routed, to the opposite side of a PCB.
Toshiba Achieves Significant Product Size Reduction using 3D Chip, Package, Board Co-design in CR-8000 Design Force
Toshiba faced a difficult design problem: their TransferJet™ technology was embedded in a customer cell phone, and when the next rev of the phone came around, they learned that they needed to shrink the board from 8mm x 8mm to 4.5mm x 6mm, and they had to shrink the module thickness from 1.7mm to 1.0mm.
Endress+Hauser Standardizes PCB Engineering and Production Processes for Industrial Measurement Products Across Distributed Locations
Endress+Hauser is a global leader in measurement instrumentation, services and solutions for industrial process engineering.
Renishaw Gets Better Fit and Impedance Control for Complex Flexible PCBs in Metrology Instruments using CR-8000
Working in 3D for the first time, Renishaw’s PCB designers noticed a host of benefits, including fixing housing fit issues upfront and easier component placement.
Advanced packaging techniques such as system-in-package (SiP), fan-out wafer-level packaging (FOWLP), 3D die stacks, etc. have been around for over a decade, yet with any other EDA design tool, it is still a tedious, time consuming, and error-prone process to implement these designs. It seems surprising that there are so few reliable EDA solutions out there, but CR-8000 Design Force is definitely the tool to look to when tackling advanced package design!
How Virtual Prototyping Tools Can Help Decide if Fan-out Wafter-level Packaging is Right for Your Product
Put simply, FO-WLP establishes die-to-die and die-to-ball grid array (BGA) connectivity directly through packaging redistribution layers (RDLs), eliminating the packaging substrate used in more-established flip-chip and wafer-level chip scale packages (WLCSP).
When it comes to advanced miniaturization of electronic products such as wearables and mobile devices, it is crucial that your design process utilize tools that meet and exceed engineering requirements. In this video, we will show how embedded passive devices are created and how they can be moved from layer to layer in Design Force.
CR-8000 moves the architecture-optimized design seamlessly into detailed design, preserving all the architectural decisions without any data re-entry. Using CR-8000’s 3D PCB design platform, the system can be implemented and verified as a multi-board system with the MCAD enclosure.
If you haven’t noticed, the electronic design process is evolving with the rise of Model-Based Systems Engineering (MBSE) and the demands of the Internet of Things (IoT). The standard 2D single board PCB design process can’t keep up with the demands of system-level design required by today’s more complex products.
In this webinar we will explore the process for performing a quick EMC analysis followed by a more in-depth EMC analysis driven by properties assigned during schematic capture.
This webinar will discuss and demonstrate the key concepts behind a 3D multi-discipline design where supplychain, PCB, MCAD and analysis all converge into a next generation design process.
This webinar will demonstrate how next generation ECAD software is being used to address the IP theft challenge with permission controls that enable users to define with a high level of granularity the design information that will be included and excluded from the published data set.
This webinar is aimed to help the audience identify disconnects in the chip, package, and board design environment; and explore methods to optimize interconnects, improve design collaboration, and enable signal traceability and analysis across the complete system.
The electronic product design process is being challenged like never before, with the need to develop feature-rich, light, compact products at a lower cost in less time.
This white paper explores the benefits of product-centric design and how it differs from current-generation PCB-centric processes and tools.
Not long ago, third dimension issues didn’t figure too much in high-speed design calculations; but signals have become so fast that those vias don’t affect them the same way they did before. Those really fast signals have become part of super-common bus standards that are used in all kinds of products.
Although we’ve been talking about it for years, in PCB design it has yet to catch on in quite the same way despite there being a host of benefits to be reaped from modular design practices. So in the first of this two-part series I’d like to challenge you to ask yourself a few questions about how you reuse designs.
As smart integrated technology connected to the internet becomes mainstream across the consumables industry, complex design challenges are no longer limited to the elite innovating companies, but spread to the far reaches of manufacturers who juggle the function, versus cost and competitive forces trade-off.
Which is a little like what you get with the latest update of CR-8000 Design Force. Instead of using stylized shapes defined by boundary boxes, CR-8000 Design Force now uses a true 3D component model with a precisely-matched 3D shape, making enclosure collision checks and 3D clearance checks much more accurate. And making fastening the enclosure lid straightforward.
A new generation of 3D multi-board product-level design tools manages multi-board placement in both 2D and 3D and enables co-design of the chip, package and board in a single environment. Multi-board design makes it possible to create and validate a design with any combination of system-on-chips (SoC), packages and PCBs as a complete system. Chip-package-board co-design enables designers to optimize routability via pin assignment, and I/O placement to minimize layer counts between the package, chip and board. The new design methodology makes it possible to deliver more functional, higher performing and less expensive products to market in less time.
In this two part series of blog posts I’m going to talk about the design challenges of complex system-on-chips (SoCs) and through-silicon vias (TSVs), and how you can overcome many difficulties by using a 3D co-design environment.
In my time working with companies in the automotive, telecom/wireless and defense industries, I often hear of the many issues facing design teams as they tackle projects made-up of multiple PCBs connected by flexible PCBs, cables, or with a backplane board. Often, the challenge arises when defining and implementing the interconnects across boards, and managing changes throughout the course of the PCB design process. Today I’m going to share with you, my top tips for overcoming these issues.