PCB West 2018

September 11-13, 2018 - Santa Clara, California

PCB West 2018

For 26 years PCB West has trained designers, fabricators and, lately, assemblers on making printed circuit boards for every product or use imaginable. The September 2017 event attracted nearly 2,000 designers and engineers and more than 100 exhibitors for the three-day technical conference and one-day sold-out exhibition. From high reliability military/aerospace to cutting-edge IoT and wearables, there’s something for everyone involved in the electronics supply chain. This is one show you cannot afford to miss.

Zuken will be showcasing its leading-edge solutions for flex and rigi-flex manufacturing checks at PCB West 2018.

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Power Integrity & Decoupling Primer for PCB Designers

Ralf Bruening, Zuken
Tuesday, 1:00PM – 3:00PM

The evolving requirements of new electronic applications in various markets (e.g., automotive, communication, IoT) are forcing engineers to an ongoing improvement of their design processes. The overall performance and the EMC behavior of such electronic systems are determined not only by the design of the circuitry, layout geometry and the IOs, but more these days by the power distribution networks (PDNs).

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Strict reliability requirements and lack of real estate on such complex systems often prevent first order power integrity countermeasures from the past (e.g., sprinkling the board with 100nF caps). Today’s supply voltage decrease with every new silicon generation is contributing to the problem domain in the same amount as the common goal of reducing power consumption of electronic systems does. This and the resulting shrinking noise margins for new ICs define increasing demands for the quality and stability of power supply systems. Hence, tighter requirements and constraints from silicon 7vendors are defined for the power supply the PCB designers have to follow – in conjunction with tougher decoupling schemes. In this session requirements and the basic of PCB power distribution systems are explained. Issues like plate capacitance, loop inductances and cavity resonance are explained without deep math. Side effects to the signal integrity and EMC domains are shown using illustrated practical examples. Guidelines for a first order covering and resolving power integrity issues are given regardless of the used PCB-design and ECAD process. The how and why of decoupling will be illustrated covering in detail the role of bypass capacitor. Power integrity simulation capabilities will be explained and demonstrated in a generic vendor-neutral manner as a potential problem-solving approach, together with silicon vendor support documents (i.e., constraint and spreadsheet tools) addressing power integrity issues as an essential part of a state-of-the-art PCB design process. Examples from various industries (e.g., automotive) will complement the session with excerpts from practical application experience.
Ralf Bruening, Zuken Technology Center (ZTC)

Santa Clara Convention Center
5001 Great America Parkway
Santa Clara, CA
95054