Synopsys HAPS

Synopsys Selects Zuken Software for HAPS Prototyping System PCB Design

FPGA-Based Prototyping Market Leader Chooses CR-8000 PCB Design Platform

WESTFORD, Mass. – Zuken announces that Synopsys has chosen Zuken’s CR-8000 PCB design platform for their HAPS® FPGA-based prototyping family of products.

Synopsys sought the highest-performing PCB design platform available to assist with designing complex high-speed boards for their HAPS prototyping systems. Synopsys’ integrated and scalable hardware and software FPGA-based prototyping systems accelerate pre-silicon software development, hardware/software integration and system validation of IP and SoC designs. HAPS systems are used by design and validation teams to accelerate their SoC design schedules and avoid costly device re-spins.

Zuken’s CR-8000 met all of our requirements and we are using it to design the new high performance components in our next-generation HAPS systems.

John Koeter, Vice President of Marketing for IP and Prototyping at Synopsys, says: “To develop Synopsys’ highest performing SoC prototyping systems, we need a PCB design environment that can address the routing, signal integrity and timing margin challenges on these complex boards. Zuken’s CR-8000 met all of our requirements and we are using it to design the new high performance components in our next-generation HAPS systems.”

Zuken’s CR-8000 is the industry’s only 3D, multi-board PCB design platform based on product-centric design principles. CR-8000 takes advantage of today’s multi-core processors and the latest graphics standards to maximize performance.

Kent McLeroth, CEO Zuken USA Inc., says: “Synopsys and Zuken have a long history of successful collaboration, and we look forward to continuing this relationship. The size and complexity of Synopsys’ HAPS systems is exactly the type of challenge we had in mind when developing the next generation CR-8000 design platform.”

About HAPS®
Synopsys HAPS® (High-performance ASIC Prototyping Systems) FPGA-based prototyping solution provides an integrated and scalable hardware-software solution used by design and validation teams to improve their ASIC design schedules and avoid costly device re-spins. HAPS systems enable a more parallel hardware/software development strategy where software developers, validation engineers and system integration experts have access to prototypes running at near real time speed months before tape-out of new ASIC silicon. FPGA-based prototypes are ideal for pre-silicon software development, system validation and hardware/software integration of ASIC IP and SoC designs.